Silicon Validation Engineer (# 7537)

Silicon Validation Engineer 3

Hillsboro, OR

6 Months

 

Summary

This role is for a Silicon Validation Engineer specializing in post-silicon validation with strong SoC validation and computer architecture expertise. The position requires solid coding/scripting skills (Python preferred, C/C++ acceptable) and experience in areas like core coherency, caches, PCIe, high-speed IOs, security, and memory blocks. Candidates with UVM/Verilog/VHDL or emulation background are also considered if open to post-silicon work.


Must have skills:

Verification

Emulation

VHDL

Verilog

UVM

 

Responsibilities

• Develop and execute validation test plans for various SoC features and subsystems in one of the following areas - functional, electrical, or power/performance.

• Perform functional, stress, and performance testing using hardware and software tools.

• Analyze test results and identify, isolate, and debug issues.

• Document and communicate test findings and status to stakeholders.

• Collaborate with design, verification, and software teams to provide feedback and suggestions for improvement.

• Support the development and enhancement of validation methodologies and tools.

 

Qualifications

• Bachelor's or master's degree in electrical engineering, computer engineering, or related field.

• 3+ years of experience in silicon validation, testing, or debugging.

• Demonstrated validation experience in one or more of the following:


Rakesh

rakesh.pandikonda@harveynash.com

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Hi I'm Rakesh

I manage this role